tir — Trident Intermediate Representation

Target-independent TIR between the AST and backend assembly.

The compiler pipeline is: parse -> typecheck -> TIRBuilder -> StackLowering -> assembly text.

Structure

• mod.rs — TIROp enum (53 variants in 4 tiers): Tier 0 structure, Tier 1 universal (stack, arithmetic, I/O, memory, hash, events, storage), Tier 2 provable (sponge, merkle), Tier 3 recursion (extension field, FRI). Display impl for debug printing.
• builder/ — AST-to-IR translation (target-independent). See builder/README.md.
• lower/ — IR-to-assembly backends (target-specific). See lower/README.md.

Key design

Higher tier = narrower target set. Tier 0 (structure) runs anywhere. Tier 1 (universal) is designed to compile to every blockchain. Tier 2 (provable) requires proof-capable targets. Tier 3 (recursion) requires recursive verification.

Structural ops (IfElse, IfOnly, Loop) carry nested Vec<TIROp> bodies so each backend can choose its own control-flow lowering strategy. Abstract ops (Open, RamRead/RamWrite, HashDigest) keep the TIR target-independent while backends map them to native instructions.

Dependencies

• TerrainConfig — VM parameters (stack depth, digest width, hash rate)
• MonoInstance — monomorphized generic function instances from the type checker
• StackManager / SpillFormatter — stack model with automatic RAM spill/reload

Entry point

Compilation uses IR via src/lib.rs — builds IR with TIRBuilder then lowers with create_stack_lowering.