tir/lower — TIR to Assembly Backend

Consumes Vec<TIROp> and produces Triton VM assembly (TASM).

Files

File	Purpose	Key symbols
`mod.rs`	Trait and factory	`StackLowering` trait, `create_stack_lowering` factory
`triton.rs`	Triton VM backend (TASM)	`TritonLowering`, `lower_op`, `flush_deferred`
`tests.rs`	Unit + regression tests	per-op tests, end-to-end compilation tests

Triton lowering strategies

Construct	Strategy
`IfElse`	deferred subroutines: `skiz`+`call` (`flush_deferred`)
`IfOnly`	`skiz`+`call` to deferred block
`Loop`	labeled subroutine with `recurse`
`FnStart`	`__name:` label
`FnEnd`	flushes deferred blocks
`Open`	`push tag; write_io 1` per field
`Seal`	pad + `hash` + `write_io 5`

Adding a backend

Create new_target.rs implementing StackLowering (one method: fn lower(&self, ops: &[TIROp]) -> Vec<String>)
Register in create_stack_lowering
Add a TerrainConfig variant

Dependencies

TIROp — the IR operations consumed by lowering
TIRBuilder — used in regression tests

Dimensions

lower

trident/src/ir/tree/lower

lower

trident/src/ir/kir/lower

lower

trident/src/ir/lir/lower

lower

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